// call for applications · programme guidelines

CHIPMATCommercialisation Grant

Design. Integrate. Validate. Qualify. Pilot. Commercialise.

Validation and commercialisation support for semiconductor design, advanced materials and application development with indigenous chips. Implemented jointly by the Maker Hub and Atal EIC.

At a glance
Grant ceiling
Up to ₹40 lakh per project
Project period
Normally 9–18 months
Maturity sought
TRL 4 or above
Portfolio size
Maximum 20 companies
Equity consideration
Flat 2% equity to Semicon Keralam per grant
Call mode
Competitive · milestone-based · processed monthly

Programme proposition

CHIPMAT bridges the gap between a technically promising prototype and a commercially deployable product, process, design IP, material platform or indigenous-chip-based application. The grant pays for the high-risk validation work that customers and investors expect, but early-stage ventures often cannot finance.

Three verticals

TRACK 01

Semiconductor Design & Allied Areas

Analog, mixed-signal, digital, RF and mmWave ICs · ASICs, SoCs, RISC-V, accelerators, reusable IP · Power ICs on Si, SiC, GaN · MEMS, smart sensors · Edge AI, hardware security · Silicon photonics · Chiplets and advanced packaging · Verification, DFT, EDA automation.

TRACK 02

Advanced Materials & Allied Areas

Electronic, dielectric, piezoelectric and magnetic materials · Graphene, 2D materials, thin films · Wide-bandgap semiconductors · Flexible and printed electronics · Substrates, interposers, encapsulants · Thermal-interface materials · Semiconductor-grade chemicals and precursors · Circular semiconductor technologies.

TRACK 03

Application Development with Indigenous Chips

Embedded, edge-AI, IoT and cyber-physical products built around indigenous processors, MCUs, ASICs, FPGAs and sensors · Reference designs, modules, gateways · Firmware, drivers, BSPs, toolchains · Porting and optimisation · Qualification, certification and customer pilots in healthcare, mobility, energy, telecom, defence, space, agriculture and fisheries.

Who should apply

  • Fabless semiconductor startups requiring design closure, verification, MPW/tapeout, packaging or test support
  • Semiconductor-enabled product companies with proprietary circuit, device, packaging, sensor or system IP
  • Advanced-materials ventures requiring process optimisation, pilot-batch production or customer qualification
  • Application-development ventures building deployable products around indigenous chips
  • Research teams or spin-outs with defensible IP and a committed plan to incorporate and commercialise
  • MSMEs developing a genuinely new, high-risk semiconductor, advanced-material or indigenous-chip application

What will not be supported

  • Basic research or academic studies without a defined product, process, IP or market outcome
  • Concept-only proposals without preliminary technical evidence
  • Routine customisation, contract engineering, trading, reselling or general software services
  • Full-scale fabrication plants, production lines, buildings or other major capital projects
  • Work already fully financed through another public or private grant

Indicative milestone tranches

TrancheShareTriggerIllustrative evidence
130%Grant agreement and approved execution planDetailed milestones, quotations, baseline data and vendor plan
230%Completion of first technical milestone setDesign review, sample data, application-integration or prototype evidence
325%Prototype / fabrication / application-integration / pilot-batch milestoneChip, packaged device, validated material, integrated prototype or pilot batch
415%Final validation and commercialisation milestoneIndependent report, customer feedback, manufacturing and market-entry plan

Evaluation framework

CriterionWeightKey question
Technical innovation and differentiation15%Is the solution meaningfully better, defensible and technically credible?
Existing maturity and evidence15%Has feasibility been demonstrated with relevant data?
Validation plan15%Will the proposed work remove the key adoption risks?
Commercial need and market opportunity15%Is there a clear use case, customer pain point and addressable market?
Customer or industry engagement10%Are users, pilots, evaluators or partners identified?
Milestones and budget10%Are outputs measurable, realistic and cost-effective?
Team capability and commitment10%Can the team execute the technical and commercial plan?
IP and competitive position5%Are ownership and protection credible?
Manufacturing / deployment / scale-up potential5%Is there a realistic route beyond the grant?

Application & selection process

  1. 01

    Application

    Submission of technical, commercial, financial, IP and team information in the prescribed format.

  2. 02

    Eligibility screening

    Review of thematic fit, legal eligibility, maturity, completeness and overlap with other funding.

  3. 03

    Domain evaluation

    Assessment by semiconductor, materials, embedded-system, application-engineering, product and commercial experts.

  4. 04

    Diagnostic interaction

    Technical clarification, milestone refinement, customer validation review and budget rationalisation.

  5. 05

    Pitch & due diligence

    Presentation to the Grant Selection and Review Committee; verification of claims, ownership, quotations and partner commitments.

  6. 06

    Approval & contracting

    Sanction, execution of the milestone-based grant agreement and equity documentation, and project commencement.

Technical, commercial & IP support

01

Design and architecture reviews · EDA, FPGA, PCB and prototyping facilities · Connections to indigenous-chip developers, SDKs and BSPs · Foundry, MPW, packaging, test and certification networks · Materials synthesis and characterisation partners.

02

Customer discovery and pilot structuring · Corporate, government and industry introductions · Pricing, licensing and go-to-market · Supply-chain and technology-transfer planning · Investor readiness and follow-on funding.

03

Prior-art and patentability guidance · Indian patent filing · Founder, licence and technology-transfer agreements · Confidentiality and pilot agreements · Background vs. foreground IP definition.

Governance

Program Steering Committee
Strategic priorities, annual budget, policy approvals, partnerships and impact review.
Grant Selection and Review Committee
Selection, milestone approval, technical/commercial review and corrective decisions.
Program Management Unit
Call administration, contracting, monitoring, finance, documentation and portfolio support.
Domain Expert Panels
Specialist review for semiconductor design, devices, advanced materials, embedded systems, packaging and testing.
// expression of interest

Apply to CHIPMAT

Submit a short Expression of Interest. Shortlisted applicants will be invited to complete the full application package (Section 8.1 of the guidelines) with budget, milestones and supporting documents.

A. Applicant details
B. Project overview
C. Problem, technology & validation
Semicon Keralam — Semiconductor Mission Kerala

Semicon Keralam (formerly IIITM-K) is the implementation agency for Semiconductor Mission Kerala — building India's centre for trusted semiconductor systems, advanced materials and space electronics.

An initiative of the Electronics & IT Department, Government of Kerala

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